DMA,远远超出了预计的难度。失败告终。代之以IO Port Introduction。
这个一定要弄明白,从PCI,IDE这些东西看起,踏踏实实地建立整个框架概念!
Fighting!
DMA,远远超出了预计的难度。失败告终。代之以IO Port Introduction。
这个一定要弄明白,从PCI,IDE这些东西看起,踏踏实实地建立整个框架概念!
Fighting!
Here is an example of the steps that occur to cause and perform a DMA transfer. In this example, the floppy disk controller (FDC) has just read a byte from a diskette and wants the DMA to place it in memory at location 0x00123456. The process begins by the FDC asserting the DRQ2 signal (the DRQ line for DMA channel 2) to alert the DMA controller.
The DMA controller will note that the DRQ2 signal is asserted. The DMA controller will then make sure that DMA channel 2 has been programmed and is unmasked (enabled). The DMA controller also makes sure that none of the other DMA channels are active or want to be active and have a higher priority. Once these checks are complete, the DMA asks the CPU to release the bus so that the DMA may use the bus. The DMA requests the bus by asserting the HRQ signal which goes to the CPU.
The CPU detects the HRQ signal, and will complete executing the current instruction. Once the processor has reached a state where it can release the bus, it will. Now all of the signals normally generated by the CPU (-MEMR, -MEMW, -IOR, -IOW and a few others) are placed in a tri-stated condition (neither high or low) and then the CPU asserts the HLDA signal which tells the DMA controller that it is now in charge of the bus.
Depending on the processor, the CPU may be able to execute a few additional instructions now that it no longer has the bus, but the CPU will eventually have to wait when it reaches an instruction that must read something from memory that is not in the internal processor cache or pipeline.
Now that the DMA “is in charge”, the DMA activates its -MEMR, -MEMW, -IOR, -IOW output signals, and the address outputs from the DMA are set to 0x3456, which will be used to direct the byte that is about to transferred to a specific memory location.
The DMA will then let the device that requested the DMA transfer know that the transfer is commencing. This is done by asserting the -DACK signal, or in the case of the floppy disk controller, -DACK2 is asserted.
The floppy disk controller is now responsible for placing the byte to be transferred on the bus Data lines. Unless the floppy controller needs more time to get the data byte on the bus (and if the peripheral does need more time it alerts the DMA via the READY signal), the DMA will wait one DMA clock, and then de-assert the -MEMW and -IOR signals so that the memory will latch and store the byte that was on the bus, and the FDC will know that the byte has been transferred.
Since the DMA cycle only transfers a single byte at a time, the FDC now drops the DRQ2 signal, so the DMA knows that it is no longer needed. The DMA will de-assert the -DACK2 signal, so that the FDC knows it must stop placing data on the bus.
The DMA will now check to see if any of the other DMA channels have any work to do. If none of the channels have their DRQ lines asserted, the DMA controller has completed its work and will now tri-state the -MEMR, -MEMW, -IOR, -IOW and address signals.
Finally, the DMA will de-assert the HRQ signal. The CPU sees this, and de-asserts the HOLDA signal. Now the CPU activates its -MEMR, -MEMW, -IOR, -IOW and address lines, and it resumes executing instructions and accessing main memory and the peripherals.
For a typical floppy disk sector, the above process is repeated 512 times, once for each byte. Each time a byte is transferred, the address register in the DMA is incremented and the counter in the DMA that shows how many bytes are to be transferred is decremented.
When the counter reaches zero, the DMA asserts the EOP signal, which indicates that the counter has reached zero and no more data will be transferred until the DMA controller is reprogrammed by the CPU. This event is also called the Terminal Count (TC). There is only one EOP signal, and since only DMA channel can be active at any instant, the DMA channel that is currently active must be the DMA channel that just completed its task.
If a peripheral wants to generate an interrupt when the transfer of a buffer is complete, it can test for its -DACKn signal and the EOP signal both being asserted at the same time. When that happens, it means the DMA will not transfer any more information for that peripheral without intervention by the CPU. The peripheral can then assert one of the interrupt signals to get the processors’ attention. In the PC architecture, the DMA chip itself is not capable of generating an interrupt. The peripheral and its associated hardware is responsible for generating any interrupt that occurs. Subsequently, it is possible to have a peripheral that uses DMA but does not use interrupts.
It is important to understand that although the CPU always releases the bus to the DMA when the DMA makes the request, this action is invisible to both applications and the operating systems, except for slight changes in the amount of time the processor takes to execute instructions when the DMA is active. Subsequently, the processor must poll the peripheral, poll the registers in the DMA chip, or receive an interrupt from the peripheral to know for certain when a DMA transfer has completed.
Collecting info about Peking OS Lab….
DMA Report….
Exam….
太浮躁,不塌实,一知半解。
写出的程序在白云上被攻的体无完肤。
自以为Dij算法理解清楚了,实际上还是没有完全领会要领,明白是对两个集合操作,却不清楚到底要不断更新哪个数据:一知半解!
花了好大力气,终于把这段程序搞定了,看起来还算舒服。
发此文自励之,万万要克服一知半解的坏毛病!
#include
#define N 5
#define O 1
//集合标志
#define S 0
#define R 1
#define INF 0xFFFF
int Near[N]; //V0到其他点的最短距离
int path[N];
void Dij(int A[][N],int path[])
{
int i,j;
int n=N;
int v;
int shortest;
int bitmap[N]; //集合标志
for(i=0;i
if(path[i]==-1) { printf(“**n”);return; }
while(1){
printf(“%d”,i+1);
i=path[i];
if(i==path[i]){
printf(“<-%d",O+1);
break;
}
printf("<-");
};
printf("n");
}
int main()
{
int s[N][N]={
{0,2,1,INF,INF},
{INF,0,INF,1,3},
{INF,2,0,INF,5},
{INF,INF,INF,0,1},
{INF,INF,INF,INF,0}
};
int i,j;
printf("Orignal Martixn");
for(j=0;j
有一隻貓發現了一隻老鼠….
於是餓虎撲羊般衝向老鼠要把他吃掉
可是後來貓卻被這隻老鼠吃掉…..
為什麼???
因為
老虎 老鼠 傻傻分不清楚
昨夜四点,梦中兴奋地醒来.
梦中的思考清晰地留在大脑还之中.
那时的感觉只有兴奋,轻松!发自内心的兴奋,轻松!一切都明晰起来了!
简单的名词,串起来,打通了思绪的经脉.如高山流水般畅快~
我终于明白一个2006年始终没有思考到答案的问题!
没想到,2007年的起点上,我彻悟了!
感谢上天送给我的新年礼物!谢谢!
2006,于我来说是不平凡的一年.
一· OS Maray雏形逐步形成。T-macD的加盟,为其成长注入了极大的活力,也给本人以极大激励。2007,Maray 1.0有望长成。顺便要提到的是,操作系统老师提议将本OS转化为一个教改项目,如果成功,以后的CS学弟的操作系统试验内容就可能是摆弄LittleMaray了。Maray也将“载入史册”。呵呵,不错的消息:) 接下去多和和老师接触下吧,努把力,搞定此事~!raywill加油!
二·基本保持了比较紧凑的生活。用Guoke的话来说,做了一个“典华男”
三·勇敢了一次,以遍体鳞伤结局,结束了一种想念的状态,迎来了麻木空虚的痛苦。情感中少了一种叫严肃的元素,溜进来了一种叫无谓的东西,“玩世不恭”也许可以用来形容这种状态。生活,缺少了那样一种牵挂,是悲哀的,然而,我无能为力。2007,爱情抗体依然存在。不过,我依然相信爱情。
四·疯狂了一次。短短一个月以内,上海,杭州,北京全部跑到。原先完全没有预计要这样溜达的,只是突然的念头,迅速的行动,够Crazy!原来,城市都是一个样….不过,西湖,那是一个美丽的印象。下一步,什么将成为我的闪念?西藏,新疆,还是大草原?
疯狂,能在你平淡的生活中点下难忘的一笔。
五·第一次象样地过了一个生日。本只是打算请大家撮一顿的。一来大家很少有机会坐在一起聚聚,二来不好意思地说,本人已经馋了好久 。第二天,他们给俺整了个大蛋糕,一顿好吃~
而且,还有意外收获:收到20多年来的第一件生日礼物 -- 围巾一条。激动ing~~~~
六·白云,搏客,QQ,手机。白云成为了一种生活,搏客成了一种发泄,QQ成了一种无聊,短信是一种更加无聊。
七·土豆,Chocolate。嗯,Chocolate。
八·步行。自从没了自行车,开始了漫长的步行之旅。YY<->N1,这成了再熟悉不过的一条道路。HUST,秋天最美!
九·暑假。大部分时间又留在了学校。在实验室大家一起做项目,早出晚归,规律的生活很幸福,只是深夜忘记了思念。哦,暑假的日子里每天都不再担心数小时候吃啥,因为,百景园的饭菜无可挑剔!我希望我是住在西边~
十·结识了很多新朋友。豆子,Star,Phil,白云上的Lightning,T-macD,etc
等等……
今年,我们大三。
人生的路还很漫长,2007年,我会更加自信地迈出每一步。
祝愿所有的朋友们在新的一年里有更大的进步,健康,幸福!
/*
file name: KMerge.c
Description:K路归并,求最佳合并方案
*/
#include <stdio.h>
void Sort(int A[],int start,int end)
{
int i,j;
int s;
for(i=start;i<=end;i++){
for(j=start;j<=end;j++){
if(A[j]>A[j+1]){
int t;
t=A[j];
A[j]=A[j+1];
A[j+1]=t;
}
}
}
printf("nSorted List:t");
for(s=start;s<=end;s++)
printf("%dt",A[s]);
printf("n ");
}
void KMerge(int k,int A[],int length)
{
int sum;
int i;
int j;
int cur,t;
Sort(A,0,length-1);
cur=0;
while(1){
sum=0;
if(length-cur<k) // last time
t=length;
else
t=cur+k;
for(i=cur;i<t;i++){
printf("%dt",A[i]);
sum+=A[i];
}
cur=cur+k-1;
printf("n");
A[i-1]=sum;
Sort(A,i-1,length-1);
if(t==length) break; // last time ,break after execute!
}
}
void main(void)
{
int K[]={1,2,3,5,7,9,13};
int k=7;
KMerge(5,K,k);
printf("Result:%dn",K[k-1]);
}
[From BYHH TOP 10]
这个世界最有挑战的事情,就是一手写程序,一手写情诗;
这个世界最窝囊的事情,就是写出别人看不懂的程序,和自己读不懂的情诗。